The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming. In the absence of input data, the output clock drifts no more than ±5%. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted.
This device, together with a PIN diode, TIA preamplifier, and a lim amp can implement a highly integrated, low cost, low power fiber optic receiver.
The ADN2806 is available in a compact 5 mm × 5 mm, 32-lead LFCSP.
