The ADN2817/ADN2818 provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 10 Mbps to 2.7 Gbps. The ADN2817/ ADN2818 automatically lock to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are exceeded, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted.
This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, and low power fiber optic receiver.
The ADN2817/ADN2818 have many optional features available through an I2C® interface. For example, the user can read back the data rate onto which the ADN2817 or ADN2818 is locked, or the user can set the device to lock only to one particular data rate if provisioning of data rates is required. A BERMON circuit provides an estimate of the received bit error rate (BER) without interruption of the data. Alternatively, the user can adjust the data sampling phase to optimize the received BER.
The ADN2817/ADN2818 are available in a compact 5 mm × 5 mm, 32-lead, lead frame chip scale package.
